diff --git a/paw/stos/arch/amd64/cpu/lapic.c b/paw/stos/arch/amd64/cpu/lapic.c
index 6fba96b..c963400 100644
--- a/paw/stos/arch/amd64/cpu/lapic.c
+++ b/paw/stos/arch/amd64/cpu/lapic.c
@@ -236,6 +236,23 @@ MdLapicSendIpi(UCHAR Vector, UCHAR DestId, BOOLEAN LogicalDest,
     LapicRegWrite(Mcb, LAPIC_ICRLO, ((UQUAD)DestId << 32) | IcrLow);
 }
 
+ULONG
+MdLapicId(VOID)
+{
+    KPCR *ThisCore;
+    MCB *Mcb;
+
+    ThisCore = HalKpcrCurrent();
+    Mcb = &ThisCore->Mcb;
+
+    /* 32-bit when in x2APIC mode */
+    if (Mcb->HasX2Apic) {
+        return LapicRegRead(Mcb, LAPIC_ID) & 0xFFFFFFFF;
+    }
+
+    return (LapicRegRead(Mcb, LAPIC_ID) >> 24) & 0xF;
+}
+
 VOID
 MdLapicInit(KPCR *Kpcr)
 {
diff --git a/paw/stos/head/arch/amd64/lapic.h b/paw/stos/head/arch/amd64/lapic.h
index 8ccc838..51560c0 100644
--- a/paw/stos/head/arch/amd64/lapic.h
+++ b/paw/stos/head/arch/amd64/lapic.h
@@ -64,6 +64,11 @@ typedef enum {
  */
 VOID MdLapicInit(KPCR *Kpcr);
 
+/*
+ * Obtain the APIC ID of the current processor
+ */
+ULONG MdLapicId(VOID);
+
 /*
  * Send an inter-processor interrupt
  *