diff --git a/paw/stos/arch/amd64/cpu/init.c b/paw/stos/arch/amd64/cpu/init.c index 0349446..43826d5 100644 --- a/paw/stos/arch/amd64/cpu/init.c +++ b/paw/stos/arch/amd64/cpu/init.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #define DTRACE(Fmt, ...) \ @@ -157,6 +158,12 @@ HalKpcrP2Init(KPCR *Kpcr) } } +VOID +HalKpcrP3Init(KPCR *Kpcr) +{ + MdLapicInit(Kpcr); +} + KPCR * HalKpcrCurrent(VOID) { diff --git a/paw/stos/arch/amd64/cpu/lapic.c b/paw/stos/arch/amd64/cpu/lapic.c new file mode 100644 index 0000000..dc52a22 --- /dev/null +++ b/paw/stos/arch/amd64/cpu/lapic.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2026, Chloe M. + * Provided under the BSD-3 clause. + * + * Description: Local APIC driver + * Author: Chloe M. + */ + +#include +#include +#include +#include +#include +#include + +/* + * Trace only on the bootstrap processor but not on any others + * to avoid log spam... + */ +#define DTRACE_BSP(Fmt, ...) do { \ + ULONG ApicBase; \ + \ + ApicBase = MdRdmsr(IA32_APIC_BASE_MSR); \ + if (ISSET(ApicBase, BIT(8))) { \ + TRACE("[ LAPIC ]: " Fmt, ##__VA_ARGS__); \ + } \ + } while (0); + +/* + * Returns true if the Local APIC unit is supported on the + * current processor. + */ +static BOOLEAN +LapicIsSupported(VOID) +{ + ULONG Edx, Unused; + + CPUID(1, Unused, Unused, Unused, Edx); + return ISSET(Edx, BIT(9)) != 0; +} + +VOID +MdLapicInit(KPCR *Kpcr) +{ + if (Kpcr == NULL) { + KeKnot(KNOT_MISC, "failed to initialize lapic driver\n"); + } + + if (!LapicIsSupported()) { + KeKnot(KNOT_MISSING_HARDWARE, "local apic not supported\n"); + } +} diff --git a/paw/stos/head/arch/amd64/lapic.h b/paw/stos/head/arch/amd64/lapic.h new file mode 100644 index 0000000..760ef6b --- /dev/null +++ b/paw/stos/head/arch/amd64/lapic.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2026, Chloe M. + * Provided under the BSD-3 clause. + * + * Description: Local APIC driver + * Author: Chloe M. + */ + +#ifndef _MACHINE_LAPIC_H_ +#define _MACHINE_LAPIC_H_ 1 + +#include +#include + +/* + * Initialize the Local APIC unit for the current + * processor. + * + * @Kpcr: KPCR of current processor + */ +VOID MdLapicInit(KPCR *Kpcr); + +#endif /* !_MACHINE_LAPIC_H_ */ diff --git a/paw/stos/head/hal/kpcr.h b/paw/stos/head/hal/kpcr.h index da06412..dd1f0ff 100644 --- a/paw/stos/head/hal/kpcr.h +++ b/paw/stos/head/hal/kpcr.h @@ -41,6 +41,13 @@ VOID HalKpcrP1Init(KPCR *Kpcr); */ VOID HalKpcrP2Init(KPCR *Kpcr); +/* + * Phase 3 initialization of processor + * + * @Kpcr: KPCR to initialize + */ +VOID HalKpcrP3Init(KPCR *Kpcr); + /* * Obtain the KPCR for the current processor, it is never to * be of a NULL value. diff --git a/paw/stos/init/init.c b/paw/stos/init/init.c index 5a6cce6..bbd6430 100644 --- a/paw/stos/init/init.c +++ b/paw/stos/init/init.c @@ -86,4 +86,7 @@ KiKernelEntry(VOID) /* Initialize the board */ HalBoardInit(); + + /* Phase 3 initialization of the bootstrap core */ + HalKpcrP3Init(&BootstrapCore); }