stos/amd64: cpu: Add HAL interrupt registration

Signed-off-by: Chloe M. <chloe@mensia.org>

paw/stos/head/hal/intr.h

@@ -9,6 +9,9 @@
 #ifndef _HAL_INTR_H_
 #define _HAL_INTR_H_ 1
 
+#include <stdef.h>
+#include <stapi/status.h>
+
 /*
  * Valid interrupt request levels
  *
@@ -23,4 +26,47 @@
 #define IRQL_DEVICE   3
 #define IRQL_HIGH     4
 
+/* IRQLs are of this type */
+typedef UCHAR IRQL;
+
+/*
+ * Interrupt data that is given to a service routine
+ *
+ * @Vector:  Interrupt vector that fired
+ * @Data:    Driver specific data
+ */
+typedef struct {
+    UCHAR Vector;
+    VOID *Data;
+} INTR_DATA;
+
+/*
+ * Interrupt handler descriptor
+ *
+ * @Irql:     Prioirty of handler
+ * @Present:  Must be 1 to be valid
+ * @Data:     Driver specific data
+ * @Handler:  Reference to interrupt handler
+ *
+ * XXX: There is no need to set the present bit when
+ *      creating an instance as it is set automatically.
+ */
+typedef struct {
+    IRQL Irql;
+    UCHAR Present : 1;
+    VOID *Data;
+    LONG(*Handler)(INTR_DATA *Data);
+} INTR_HANDLER;
+
+/*
+ * Register an interrupt handler
+ *
+ * @Handler: Interrupt handler to register
+ * @IsUser:  Should be set if user interrupt
+ *
+ * XXX: Most of the times, @IsUser should remain unset,
+ *      it is mostly there for the sake of scalability.
+ */
+ST_STATUS HalRegisterIntr(const INTR_HANDLER *Handler, BOOLEAN IsUser);
+
 #endif  /* !_HAL_INTR_H_ */