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stos/amd64: lapic: Clean up LAPIC IPI code

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Signed-off-by: Chloe M. <chloe@mensia.org>
This commit is contained in:
Chloe M.
2026-06-27 14:23:44 -05:00
parent 798c9c2ee8
commit 89e87fc525
1 changed files with 9 additions and 12 deletions
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paw/stos/arch/amd64/cpu/lapic.c
+9 -12
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@@ -191,7 +191,6 @@ MdLapicSendIpi(UCHAR Vector, UCHAR DestId, BOOLEAN LogicalDest,
KPCR *ThisCore;
MCB *Mcb;
ULONG IcrLow, IcrHigh;
ULONG Icr = 0;
/*
* If the shorthand is refering to ourselves and we are x2APIC we
@@ -204,30 +203,29 @@ MdLapicSendIpi(UCHAR Vector, UCHAR DestId, BOOLEAN LogicalDest,
}
Mcb = &ThisCore->Mcb;
IcrLow = 0;
IcrHigh = 0;
/* Clamp these fields */
DelMod &= 7;
Xnd &= 3;
/* Encode the ICR */
Icr |= Vector & 0xFF;
Icr |= Xnd << 18;
Icr |= DelMod << 8;
Icr |= LogicalDest << 11;
IcrLow |= Vector & 0xFF;
IcrLow |= Xnd << 18;
IcrLow |= DelMod << 8;
IcrLow |= LogicalDest << 11;
/* For xAPIC only */
if (!Mcb->HasX2Apic) {
IcrHigh = ((UQUAD)Icr >> 32) & (ULONG)-1;
IcrLow = Icr & (ULONG)-1;
IcrHigh |= (UQUAD)DestId << 24;
LapicRegWrite(Mcb, LAPIC_ICRHI, IcrHigh);
LapicRegWrite(Mcb, LAPIC_ICRLO, IcrLow);
/* Only on legacy xAPICs do we poll */
for (;;) {
Icr = LapicRegRead(Mcb, LAPIC_ICRLO);
if (ISSET(Icr, IPI_DELSTAT_PENDING))
IcrLow = LapicRegRead(Mcb, LAPIC_ICRLO);
if (ISSET(IcrLow, IPI_DELSTAT_PENDING))
HalCpuSpinWait();
}
@@ -235,8 +233,7 @@ MdLapicSendIpi(UCHAR Vector, UCHAR DestId, BOOLEAN LogicalDest,
}
/* On x2APICs only as it queues */
Icr |= (UQUAD)DestId << 32;
LapicRegWrite(Mcb, LAPIC_ICRLO, Icr);
LapicRegWrite(Mcb, LAPIC_ICRLO, ((UQUAD)DestId << 32) | IcrLow);
}
VOID