stos/amd64: cpu: Add exception handling groundwork

Signed-off-by: Chloe M. <chloe@mensia.org>
2026-06-23 19:11:14 +00:00
parent 27af606ba2
commit b6d4a1c963
8 changed files with 401 additions and 2 deletions
@@ -13,4 +13,21 @@
 #define IDT_TRAP_GATE   0x8F
 #define IDT_USER_GATE   0xEE

+#ifndef __ASSEMBLER__
+/*
+ * Set an IDT entry
+ *
+ * @Vector:  Interrupt vector to set
+ * @IsrBase: ISR base to set
+ * @Type:    Gate type
+ * @Ist:     Interrupt stack table index
+ */
+VOID MdIdtSetEntry(UCHAR Vector, UPTR IsrBase, UCHAR Type, UCHAR Ist);
+
+/*
+ * Load the IDT
+ */
+VOID MdIdtLoad(VOID);
+
+#endif  /* !__ASSEMBLER__ */
 #endif  /* !_MACHINE_IDT_H_ */