 Chloe M.
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114cc434d2
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stos/amd64: intr: Add IRQL management
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 22:01:52 +00:00 |
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Chloe M.
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27c6ca8125
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stos/amd64: cpu: Add HAL interrupt registration
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 21:20:09 +00:00 |
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Chloe M.
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b6d4a1c963
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stos/amd64: cpu: Add exception handling groundwork
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 19:11:14 +00:00 |
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Chloe M.
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333331171d
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stos/amd64: cpu: Obtain more processor info
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 07:03:35 +00:00 |
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Chloe M.
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32a1463b92
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stos: hal: Implement HalMmuForkVas()
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 23:27:04 +00:00 |
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Chloe M.
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5b30974cb0
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stos/amd64: mmu: Implement page mapping
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 22:35:42 +00:00 |
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Chloe M.
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532e46c62f
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stos: hal: Add virtual address space helpers
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 21:46:51 +00:00 |
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Chloe M.
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e3954277f8
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stos/amd64: Impl phase 1 processor init
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 19:15:58 +00:00 |
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Chloe M.
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6f222ae96c
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stos: init: Add kernel C entry
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 00:43:03 +00:00 |
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Chloe M.
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d46ce89f83
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stos/amd64: Load the GDT
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 00:23:12 +00:00 |
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Chloe M.
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71de0c20b8
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build: Implement build pipeline
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-21 23:29:51 +00:00 |
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