 Chloe M.
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9b1f4dde43
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stos/amd64: cpu: Save KPCR in IA32_GS_BASE
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-24 05:49:59 +00:00 |
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Chloe M.
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23746a2918
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stos: ex: Add per-cpu pool allocator groundwork
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-24 05:05:39 +00:00 |
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Chloe M.
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0fbce493e3
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stos: hal: Add IRQL for critical sections
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 22:19:40 +00:00 |
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Chloe M.
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114cc434d2
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stos/amd64: intr: Add IRQL management
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 22:01:52 +00:00 |
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Chloe M.
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27c6ca8125
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stos/amd64: cpu: Add HAL interrupt registration
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 21:20:09 +00:00 |
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Chloe M.
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e1a115cccc
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stos: hal: Add interrupt IRQL defs
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 20:14:03 +00:00 |
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Chloe M.
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69ddd09500
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stos/amd64: Add processor primitives
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-23 20:13:49 +00:00 |
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Chloe M.
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32a1463b92
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stos: hal: Implement HalMmuForkVas()
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 23:27:04 +00:00 |
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Chloe M.
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5b30974cb0
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stos/amd64: mmu: Implement page mapping
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 22:35:42 +00:00 |
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Chloe M.
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532e46c62f
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stos: hal: Add virtual address space helpers
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 21:46:51 +00:00 |
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Chloe M.
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e3954277f8
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stos/amd64: Impl phase 1 processor init
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 19:15:58 +00:00 |
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Chloe M.
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6f126b6761
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stos: hal: Add kernel processor control region
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 07:21:05 +00:00 |
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Chloe M.
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ef0588512c
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stos: pmm: Add pageframe descriptor population
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 06:33:14 +00:00 |
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Chloe M.
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aec7ddb4a2
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stos+amd64: Add serial logging + trace facility
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-06-22 01:39:29 +00:00 |
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