Chloe M.
531a027122
We cannot be certain that the CR8 register will be zeroed by the time we have control passed to us, therefore it is wise to set it ourselves. Signed-off-by: Chloe M. <chloe@mensia.org>
134 lines
2.9 KiB
C
134 lines
2.9 KiB
C
/*
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* Copyright (c) 2026, Chloe M.
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* Provided under the BSD-3 clause.
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*
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* Description: Kernel processor control region
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* Author: Chloe M.
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*/
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#include <hal/kpcr.h>
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#include <hal/intr.h>
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#include <ex/trace.h>
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#include <machine/cpuid.h>
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#include <machine/idt.h>
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#include <stdef.h>
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#define DTRACE(Fmt, ...) \
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TRACE("[ CPU ]: " Fmt, ##__VA_ARGS__)
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/* Processor types */
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#define PROCESSOR_OEM 0
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#define PROCESSOR_OVERDRIVE 1
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#define PROCESSOR_DUAL 2
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#define PROCESSOR_TYPE(TYPE) \
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((TYPE) >= NELEM(ProcessorType)) \
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? "unknown" \
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: ProcessorType[(Type)]
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/* Processor type lookup table */
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static const CHAR *ProcessorType[] = {
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[PROCESSOR_OEM] = "OEM processor",
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[PROCESSOR_OVERDRIVE] = "Intel overdrive processor",
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[PROCESSOR_DUAL] = "Intel P5 dual processor"
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};
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/* From cpu/vector.S */
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extern VOID MdVectorInit(VOID);
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/*
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* Called by ProcessorIdentify()
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*/
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static VOID
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ProcessorIdentify1(MCB *Mcb)
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{
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UCHAR ManufactId[13];
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ULONG Ebx, Edx, Ecx, Unused;
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if (Mcb == NULL) {
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return;
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}
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/* Grab the manufacturer ID */
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ManufactId[12] = '\0';
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CPUID(0, Unused, Ebx, Ecx, Edx);
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/* DWORD 0 */
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ManufactId[0] = Ebx & 0xFF;
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ManufactId[1] = (Ebx >> 8) & 0xFF;
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ManufactId[2] = (Ebx >> 16) & 0xFF;
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ManufactId[3] = (Ebx >> 24) & 0xFF;
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/* DWORD 1 */
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ManufactId[4] = Edx & 0xFF;
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ManufactId[5] = (Edx >> 8) & 0xFF;
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ManufactId[6] = (Edx >> 16) & 0xFF;
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ManufactId[7] = (Edx >> 24) & 0xFF;
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/* DWORD 2 */
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ManufactId[8] = Ecx & 0xFF;
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ManufactId[9] = (Ecx >> 8) & 0xFF;
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ManufactId[10] = (Ecx >> 16) & 0xFF;
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ManufactId[11] = (Ecx >> 24) & 0xFF;
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DTRACE("vendor : %s\n", ManufactId);
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}
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static VOID
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ProcessorIdentify(MCB *Mcb)
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{
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ULONG Eax, Unused;
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UCHAR ModelLow, ModelHigh;
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UCHAR FamilyLow, FamilyHigh;
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UCHAR Type;
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if (Mcb == NULL) {
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return;
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}
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CPUID(1, Eax, Unused, Unused, Unused);
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/* Extarct the model ID */
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ModelLow = (Eax >> 4) & 0xF;
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ModelHigh = (Eax >> 16) & 0xF;
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Mcb->ModelId = (ModelHigh << 4) | ModelLow;
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/* Extract the family ID */
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FamilyLow = (Eax >> 8) & 0xF;
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FamilyHigh = (Eax >> 20) & 0xFF;
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Mcb->FamilyId = (FamilyHigh << 4) | FamilyLow;
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/* Extract the processor type */
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Type = (Eax >> 12) & 3;
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/* Informational logging */
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DTRACE("model : %X\n", Mcb->ModelId);
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DTRACE("family : %X\n", Mcb->FamilyId);
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DTRACE("type : %s\n", PROCESSOR_TYPE(Type));
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ProcessorIdentify1(Mcb);
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}
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VOID
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HalKpcrP1Init(KPCR *Kpcr)
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{
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MCB *Mcb;
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if (Kpcr == NULL) {
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return;
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}
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Mcb = &Kpcr->Mcb;
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ProcessorIdentify(Mcb);
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/* Load the IDT */
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MdVectorInit();
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MdIdtLoad();
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/* Default to IRQL_PASSIVE */
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ASMV(
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"mov %0, %%cr8"
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:
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: "r" ((UQUAD)IRQL_PASSIVE)
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: "memory"
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);
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}
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