Chloe M. 5beb6f1d62 stos/amd64: Add MSR register helpers ...

Signed-off-by: Chloe M. <chloe@mensia.org>

2026-06-24 05:49:32 +00:00

..

cpuid.h

stos/amd64: Add CPUID helper

2026-06-22 17:03:49 +00:00

frame.h

stos/amd64: Add trapframe defs

2026-06-23 04:31:32 +00:00

gdt.h

stos/amd64: Add GDT header

2026-06-23 19:00:14 +00:00

idt.h

stos/amd64: cpu: Add exception handling groundwork

2026-06-23 19:11:14 +00:00

kfence.h

stos/amd64: Add kernel fence helper

2026-06-23 18:59:57 +00:00

mcb.h

stos/amd64: Impl phase 1 processor init

2026-06-22 19:15:58 +00:00

msr.h

stos/amd64: Add MSR register helpers

2026-06-24 05:49:32 +00:00

page.h

stos: pmm: Add pageframe descriptor population

2026-06-22 06:33:14 +00:00

pio.h

stos/amd64: Add port I/O helpers

2026-06-22 01:36:40 +00:00

prim.h

stos/amd64: prim: Prefer UQUAD over QUAD for ASWAP

2026-06-23 22:19:21 +00:00

trap.h

stos/amd64: cpu: Add exception handling groundwork

2026-06-23 19:11:14 +00:00

vas.h

stos/amd64: vas: Add helper to get VAS base

2026-06-22 23:26:42 +00:00